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Publikationen

Patente

  • M. Krstic, G. Schoof, V. Petrovic, S. Weidling, E. Sogomonyan, M. Gössel, Schaltungsanordnung mit Detektion oder Behandlung von transienten Fehlern in einem kombinatorischen Schaltungsteil, German Patent 102013225039.B4, Mai 2016.
  • S. Zeidler, M. Krstic, C. Wolf, R. Kraemer,  Verfahren und Infrastruktur zum Test von nicht-zeitdeterministischen Schaltungen, EP-Application, 09.02.2012, AZ: 12 154 651.9.
  • I. Santamaria, J. Vía, J. Ibáñez, J. Pérez, R. Kraemer, M. Krstic, Z. Stamenkovic, K. Tittelbach-Helmrich, Baseband and MAC architectures for enhanced MIMO transmissions in 802.11a WLAN systems, European patent EP 2 234 355 B1, 31.10.2012.
  • M. Krstić, F. Gürkaynak, X. Fan, E. Grass, GALS circuit block and GALS circuit device suitable for bursty data transfer, European Patent EP 2 060 961 B1, 25.12.2013.
  • M. Krstić, E. Grass, I/O Master Driven GALS circuit with arbitrated input and output clock drive ("GALS-Schaltung mit arbitriertem eingangs- und ausgangsseitigem Taktantrieb”), EU publication date, 20.05.2009, publication number 2060961, German Patent, Publication Date: 4.6.2009, German Publication Number: DE 10 2008 023 507 A1.
  • E. Grass, M. Krstić, F. Winkler, GALS-Schaltung und Verfahren zum Betrieb einer GALS-Schaltung (“GALS-circuit and method to use a GALS-circuit”), German Patent, Publication Date: 15.02.2007, German Publication Number: DE 10 2005 044 115 A1, International Publication Date: 8. Februar 2007, International Publication Number: WO 2007/014949 A2.
  • M. Krstić, E. Grass, Asynchrone Hüllschaltung für eine global asynchrone, lokal synchrone (GALS) Schaltung (“Asynchronous Wrapper for a Globally Asynchronous Locally Synchronous (GALS) circuit”), European patent number 1590727, Publication Date: 5. August 2004, US patent no. US 7426650 B2, date of patent Sep. 16, 2008.

Beiträge in Journalen und Magazinen

  • X. Fan, M. Stegmann, O. Schrape, S. Zeidler, I. Jensen, J. Thorsen, T. Bjerregaard, M. Krstic,  Frequency-domain optimization of digital switching noise based on clock scheduling, IEEE Transactions on Circuits and Systems I, 63-I(7): 982-993 (2016)
  • M. Krstic, S. Weidling, V. Petrovic, E. Sogomonyan, Enhanced Architectures for Soft Error Detection and Correction in Combinational and Sequential Circuits, Microelectronics Reliability, Elsevier, Volume 56, January 2016, Pages 212–220, DOI:10.1016/j.microrel.2015.10.022
  • S. Zeidler, X. Fan, O. Schrape, M. Krstić, An Early Stage Design Flow for Switching Noise Attenuation, Journal of Circuits, Systems, and Computers (JCSC) Vol. 25, issue 3, 2016, DOI: 10.1142/S0218126616400223
  • M. Krstic, X. Fan, E. Grass, L. Benini, M. R. Kakoee, C. Heer, B. Sanders, A. Strano, D. Bertozzi, Evaluation of GALS Methods in scaled CMOS Technology – Moonrake Chip Experience, International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 2012, Vol. 3. Iss.4, pp 1-18, DOI: 10.4018/jertcs.2012100101
  • Z. Stamenkovic, K. Tittelbach-Helmrich, M. Krstic, J. Ibanez, V. Elvira, I. Santamaria, MAC and Baseband Processors for RF-MIMO WLAN, EURASIP Journal on Wireless Communications and Networking, Springer Open Journal., 2011:207, doi:10.1186/1687-1499-2011-207
  • M. Krstić, T. Krol, X. Fan, E. Grass, Reducing Electromagnetic Interference Using Globally Asynchronous Locally Synchronous Approach, Journal of Low-Power Electronics, JOLPE, Vol. 6, No. 1, April 2010, pp. 181-191(11), DOI: http://dx.doi.org/10.1166/jolpe.2010.1069
  • A. Troya, K. Maharatna, M. Krstić, E. Grass, U. Jagdhold, R. Kraemer, Low-Power VLSI Implementation of the Inner Receiver for OFDM-based WLAN Systems, IEEE Transactions on Circuits and Systems I, March 2008, Vol. 55, No. 2, pp. 672-686, DOI: 10.1109/TCSI.2007.913732
  • M. Krstić, E. Grass, F. Gürkaynak, P. Vivet, Globally Asynchronous, Locally Synchronous Circuits: Overview & Outlook, IEEE Design & Test of Computers, Vol. 24, No. 5. September-October 2007, pp. 430-441, DOI: 10.1109/MDT.2007.164
  • A. Troya, K. Maharatna, M. Krstić, E. Grass, U. Jagdhold, and Rolf Kraemer, Efficient Inner Receiver Design for OFDM-based WLAN Systems: Algorithm and Architecture, IEEE Transactions on Wireless Communications, Vol. 6, No. 4, Apr 2007, pp. 1374-1385, DOI: DOI: 10.1109/TWC.2007.348334
  • M. Krstić, E. Grass, C. Stahl, M. Piz, System Integration by Request-driven GALS Design, IEE Proc. Computers & Digital Techniques, Vol. 153, Iss. 5, September 2006, pp 362-372, DOI: 10.1049/ip-cdt:20050210
  • K. Maharatna, S. Banerjee, E. Grass, M. Krstić, A. Troya, Modified Virtually Scaling Free Adaptive CORDIC Rotator Algorithm and Architecture, IEEE Transactions on Circuits and Systems for Video Technology (CSVT), Vol. 15, No. 11, November 2005, pp. 1463-1474, DOI: 10.1109/TCSVT.2005.856908
  • M. Krstić, M. Stojčev, G. Djordjević, I. Andrejić, A Mid Value-Select Voter, Microelectronics Reliability, Vol./Issue 45/3-4, 2005, Elsevier Science, pp. 733-738, DOI: 10.1016/j.microrel.2004.07.006
  • M. Stojčev, G. Djordjević, M. Krstić, A Hardware Mid-Value-Select Voter Architecture, Microelectronics Journal 32 (2001), Elsevier Science, pp.149-162, DOI: 10.1016/S0026-2692(00)00114-2

Konferenzbeiträge

  • Stefan Weidling, Milos Krstic and Michael Goessel, Identifizierung fehlerbewahrender Speicherelemente zur Vermeidung der Fehlerakkumulation, 29. Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Lübeck, 2017, accepted paper.
  • Anselm Breitenreiter, Jesús López, Pedro Reviriego, Daniel González and Milos Krstic, Eine Methode zur Verifikation von Mixed-Signal-ASIC, 29. Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Lübeck, 2017, accepted paper.
  • Marko Andjelkovic, Vladimir Petrovic, Miljana Nenadovic, Gunther Schoof, Milos Krstic and Rolf Kraemer Entwurf eines On-Chip-Systems für die Messung, 29. Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Lübeck, 2017, accepted paper.
  • Marko Andjelkovic, Miljana Nenadovic, Vladimir Petrovic, Milos Krstic, Rolf Kraemer, Evaluation of Pulse Stretcher for Detection of Very Short Single Event Transients, Fifth International Conference on Radiation and Applications in Various Fields of Research (RAD 2017), Budva, Montenegro, accepted paper.
  • Marko Andjelkovic, Aleksandar Ilic, Zoran Stamenkovic, Milos Krstic, Rolf Kraemer, An Overview of Circuit-Level Single Event Transient Current Models, Fifth International Conference on Radiation and Applications in Various Fields of Research (RAD 2017), Budva, Montenegro, accepted paper.
  • M. Krstic, Asynchronous Design Methods for Dark Silicon Chips, Festschrift on the occasion of 60th birthday of Prof. Alex Yakovlev, Newcastle University, UK, 2016
  • M Cirillo, G. Fischer, F. Teply, J. Schmidt, M. Krstic, V. Petrovic, Radiation-Hardened SiGe BiCMOS Technologies for Analogue and Mixed-Signal IC, AMICSA/DSP, June 12-16 in Gothenburg, Sweden.
  • A. Simevski, K. Schleisiek, V. Petrovic, N. Beller, P. Skoncej, G. Schoof, M. Krstic, Implementation of a Real Time Unit for Satellite Applications, 19th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 2016, Kosice.
  • O. Schrape, A. Koczor, P. Penkala, V. Petrovic, M. Krstic, Implementation of DBFN Processor for Synthetic Aperture Radar Application, 19th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 2016, Kosice.
  • M. Jelodari, M. Krstic, J. Garside, Automatic Clock: A Promising Approach Toward GALSification, ASYNC2016 - 22nd IEEE International Symposium on Asynchronous Circuits and Systems, Industry Session, Porto Alegre, May 08 - 11, 2016, Brazil, industrial paper
  • M. Babic, S. Zeidler, M. Krstic, GALS Partitioning Methodology for Substrate Noise Reduction in Mixed-Signal Integrated Circuits, IEEE ASYNC 2016, Porto Allegre, Brazil.
  • S. Weidling, M. Krstic, V. Petrovic, E. Sogomonyan, Architektur mit reduzierter Komplexität zur Erkennung und Korrektur von transienten Fehlern in kombinatorischer und sequentieller Logik, Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2016).
  • S. Gao, C. Mao, F. Qin, A. Patyuchenko, C. Tienda, M. Younis, G. Krieger, S. Glisic, W. Debski, L. Boccia, G. Amendola, E. Arnieri, M. Krstic, A. Koczor, P. Penkala and E. Celton, Dual-Band Digital Beamforming Synthetic Aperture Radar for Earth Observation, Asia-Pacific Microwave Conference (APMC2015), accepted paper.
  • M. Babic, X. Fan, M. Krstic, Frequency-Domain Modeling of Ground Bounce and Substrate Noise for Synchronous and GALS Systems, 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2015), Bahia, Brazil.
  • X. Fan, O. Schrape, S. Zeidler, M. Krstić, M. Stegmann, I.Jensen, J. Thorsen, T. Bjerregaard, SCREAMER – A Demonstrator Chip for Spectral Noise Optimization By Clock Latency Scheduling, IEEE International System-on-Chip Conference (SOCC) 2015, Design track.
  • St. Zeidler, M. Krstic, A Survey about Testing Asynchronous Circuits, 22nd European Conference on Circuit Theory and Design (ECCTD 2015), Trondheim, August 24 - 26, 2015, Norway, DOI: 10.1109/ECCTD.2015.7300128, invited and reviewed paper.
  • S. Gao, F. Qin, C. Mao, M. Younis, G. Krieger, S. Glisic, W. Debski, L. Boccia, G. Amendola, E. Arnieri, M. Krstic, P. Penkala, E. Celton, A Ka/X-Band Digital Beamforming Synthetic Aperture Radar for Earth Observation, 7th International Conference on Recent Advances in Space Technologies, RAST 2015, Istanbul, Turkey, DOI: 10.1109/RAST.2015.7208429.
  • A. Patyuchenko, M. Younis, G. Krieger, Z. Wang, S. Gao, F. Qin, C. Mao, S. Glisic, W. Debsk, L. Boccia, G. Amendola, E. Arnieri, M. Krstic, E. Celton, P. Penkala, Highly Integrated Dual-Band Digital Beamforming Synthetic Aperture Radar, European Microwave Week 2015.
  • M. Babic, M. Krstic, A Coarse Model for Estimation of Switching Noise Coupling in Lightly Doped Substrates, 18th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015, Belgrade, DOI: 10.1109/DDECS.2015.27.
  • S. Zeidler, X. Fan, M. Krstic, A Design Preconditioning Flow for Low-Noise Circuits, 18th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015, Belgrade, DOI: 10.1109/DDECS.2015.17.
  • V. Petrovic, M. Krstic, Designflow for radhard TMR Flip-Flops, 18th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015, Belgrade, DOI: 10.1109/DDECS.2015.65.
  • N. Savic, M. Krstic, On Implementation of TPMS Receiver for Traffic Data Collection, ISSSE (International Symposium on Signals, Systems and Electronics) within URSI AT-RASC Conference, Spain, 2015.
  • V. Petrovic, G. Schoof, M. Krstic, Verbesserter TMR-Strahlungsschutz für ASIC-Layouts, VDE/VDI– Workshop, Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2015).
  • S. Weidling, M. Krstic, V. Petrovic, M. Gössel, Neue Methodik zur Implementierung fehlertoleranter pipeline-basierter Architekturen,VDE/VDI- Workshop, Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2015).
  • S. Taube, V. Petrovic, M. Krstic, Fault Tolerant Implementation of a SpaceWire Interface, 21st IEEE International Conference on Electronics Circuits and Systems (ICECS), December 7-10, 2014 Marseille, France, DOI: 10.1109/ICECS.2014.7050060.
  • A. Patyuchenko, M. Younis, Z. Wang, S. Gao, F. Qin, S. Glisic, W. Debski, L. Boccia, M. Krstic, E. Celton, P. Penkala, Spaceborne X/Ka-Band Digital Beamforming Synthetic Aperture Radar for Earth Observation, 2nd Workshop on Ka-band Earth Observation Radar Missions, Noordwijk, Netherlands.
  • N. Savic, M. Junghans, M. Krstic, Evaluating Tire Pressure Monitoring System for Traffic Management Purposes – Simulation study, 17th International IEEE Conference on Intelligent Transportation Systems - ITSC 2014, Qingdao, China, October 8-11, 2014, DOI: 10.1109/ITSC.2014.6958031.
  • X. Fan. S. Peter, M. Krstic, GALS Design of ECC against Side Channel Attacks - A Comparative Study, 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2014), Palma de Mallorca, Spain, DOI: 10.1109/PATMOS.2014.6951905.
  • O. Schrape, M. Appel, F. Winkler, M. Krstic, Low-Power Design Methodology for CML and ECL Circuits, 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2014), Palma de Mallorca, Spain, DOI: 10.1109/PATMOS.2014.6951898.
  • N. Savic, M. Junghans, M. Krstic, Traffic Data Collection using Tire Pressure Monitoring System, 14th International Conference Transport Systems Telematics (TST 2014), Krakow, Poland, DOI: 10.1007/978-3-662-45317-9_3.
  • A. Simevski, R. Kraemer, M. Krstic, Investigating core-level N-modular redundancy in multiprocessors, 8th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-14) September 23-25, 2014, Aizu-Wakamatsu, Japan, DOI: 10.1109/MCSoC.2014.33.
  • A. Simevski, R. Kraemer; M. Krstic, Increasing multiprocessor lifetime by Youngest-First Round-Robin core gating patterns, NASA/ESA Adaptive Hardware and Systems conference (AHS-2014), Leicester, 2014, DOI: 10.1109/AHS.2014.6880182.
  • M. Krstic, S. Weidling, V. Petrovic, M. Gössel, Improved Circuitry for Soft Error Correction in Combinational Logic in Pipelined Designs, IEEE International On-Line Testing Symposium 2014, DOI: 10.1109/IOLTS.2014.6873678.
  • X. Fan. S. Peter, M.Krstic, From Old Ideas to New Questions – Exploring GALS Design for SCA Resistance, Fresh Ideas Workshop within IEEE ASYNC 2014, Potsdam, Mai, 2014.
  • O. Schrape, M. Appel, F. Winkler, M. Krstic, A 12 Gb/S Standard Cell Based ECL 4:1 Serializer with Asynchronous Parallel Interface, IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Abu Dhabi, UAE, Dec, 2013, DOI: 10.1109/ICECS.2013.6815330, DOI: 10.1109/ICECS.2013.6815330.
  • S. Zeidler, M. Goderbauer, M. Krstic, Design of a Low-Power Asynchronous Elliptic Curve Cryptography Coprocessor, IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Abu Dhabi, UAE, Dec, 2013, DOI: 10.1109/ICECS.2013.6815478, DOI: 10.1109/ICECS.2013.6815478.
  • N. Šobajić, J. Gutiérrez, R. Kraemer, M. Krstić, Using Wake-up Receivers in Bird Telemetry - Viability Study, 11th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services - TELSIKS 2013, Nis, Serbia, DOI: 10.1109/TELSKS.2013.6704434.
  • A. Simevski, R. Kraemer; M. Krstic, Automated Integration of Fault Injection into the ASIC Design Flow, 16th IEEE Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS 2013), New York, USA, DOI: 10.1109/DFT.2013.6653615.
  • A. Simevski, R. Kraemer; M. Krstic, Register-Transfer Level NMR System Generator, Fachtagung „Zuverlässigkeit und Entwurf“ (ZuE) 2013, 24. - 26. September 2013, Dresden, https://www.vde-verlag.de/proceedings-de/453539015.html.
  • M. Marinkovic, E. Grass, M. Krstic, An Early Termination Strategy for Irregular LDPC Codes with Layered Decoding - Performance Evaluation and Implementation, The Tenth International Symposium on Wireless Communication Systems (ISWCS '13), Ilmenau, Germany, www.vde-verlag.de/proceedings-de/453529104.html.
  • S. Parkes, C. McClements, A. Ferrer, A. Gonzalez, R. Ginosar, T. Liran, D. Alon, M. Goldberg, G. Sokolov, G. Burdo, N. Blatt, P. Rastetter, M. Krstic, A. Crescenzio, A Radiation Tolerant Spacefibre Interface Device, International SpaceWire Conference 2013, Gothenburg, Sweden.
  • R. Ginosar, T. Liran, D. Alon, R. Dobkin, M. Goldberg, G. Sokolov, G. Burdo, N. Blatt, S. Parkes, P. Rastetter, M. Krstic, A. Crescenzio, Rad-Hard 2.5 Gbps SpaceFibre Interface Device, DASIA 2013.
  • X. Fan, O. Schrape, M. Marinkovic, P. Dähnert, M. Krstic, E. Grass, GALS Design for Spectral Peak Attenuation on Digital Switching Current, IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) 2013, Santa Monica, USA, DOI: 10.1109/ASYNC.2013.28.
  • M. Krstic, N. Savic, R. Kraemer, M. Junghans, Applying Tire Pressure Monitoring Devices for Traffic Management Purposes, International Symposium on Signals, Systems and Electronics (ISSSE) 2012, Potsdam: DOI: 10.1109/ISSSE.2012.6374295.
  • S. Zeidler, C. Wolf, M. Krstic, R. Kraemer, Functional Pattern Generation for Asynchronous Designs in a Test Processor Environment, IEEE Asian Test Symposium 2012, DOI: 10.1109/ATS.2012.40.
  • M. Marinkovic, M. Krstic, E. Grass, M. Piz, Performance and Complexity Analysis of Channel Coding Schemes for Multi-Gbps Wireless Communications, IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC) 2012, DOI: 10.1109/PIMRC.2012.6362670.
  • A. Simevski, E. Hadzieva, R. Kraemer, M. Krstic, Scalable Design of a Programmable NMR Voter with Inputs’ State Descriptor and Self-checking capability, NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012), DOI: 10.1109/AHS.2012.6268648.
  • X. Fan, M. Krstic, E. Grass, Performance analysis of GALS datalink based on pausible clocking scheme, IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) 2012, DOI: 10.1109/ASYNC.2012.24.
  • A. Simevski, R. Kraemer, M. Krstic, Platform for Automated HW/SW Co-verification, Testing and Simulation of Microprocessors, 13th IEEE Latin-American Test Workshop (LATW12), DOI:10.1109/LATW.2012.6261242.
  • S. Zeidler, C. Wolf, M. Krstic, R. Kraemer, Entwurf einer neuen Testprozessorlösung für den Funktionaltest asynchroner Schaltungen, 24. GI/GMM/ITG-Workshop „Testmethoden und Zuverlässigkeit von Schaltungen und Systemen“, Feb 2012, Cottbus, Germany.
  • X. Fan, M. Krstić, E. Grass, B. Sanders, C. Heer, Exploring Pausible Clocking Based GALS Design for 40-nm System Integration, Design, Automation & Test in Europe (DATE) Conference, Dresden, March 2012, DOI: 10.1109/DATE.2012.6176663.
  • C. Wolf, S. Zeidler, M. Krstic, R. Kraemer, Overview on ATE Test and Debugging Methods for Asynchronous Circuits, In Proc. 12th International Workshop on Microprocessor Test and Verification (MTV 2011), pp. 16-21, Dec 2011, Austin, TX, DOI: 10.1109/MTV.2011.12.
  • O. Schrape, M. Krstic, G. Philipp, F. Winkler, A Digital Design Flow for Differential ECL High Speed Applications, In Proceedings of IP-SoC Conference, Grenoble, 2011, www.design-reuse.com/articles/29141/digital-design-flow-for-differential-ecl-high-speed-applications.html .
  • S. Zeidler, C. Wolf, M. Krstic, F. Vater, R. Kraemer, Design of a Test Processor for Asynchronous Chip Test, In Proc. Asian Test Symposium (ATS) 2011, pp. 244-250, DOI: 10.1109/ATS.2011.17.
  • A. Simevski, R. Kraemer, M. Krstic, An Overview of Dependable Microprocessor Architectures – Pursuing the State-of-the-Art, In Proc. of X International Conference ETAI 2011, Ohrid, Macedonia.
  • M. Krstic, X. Fan, E. Grass, L. Benini, M. R. Kakoee, C. Heer, B. Sanders, A. Strano and D. Bertozzi, Moonrake Chip - GALS Demonstrator in 40 nm CMOS Technology, In Proc. of International Symposium on System-on-Chip (SoC), 2011, pp. 9 – 13, Tampere, Finland, Oct - Nov 2, 2011, DOI: 10.1109/ISSOC.2011.6089693.
  • A. Simevski, M. Krstic, R. Kraemer, Low-complexity integrated circuit aging monitor, In Proc. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 121 – 125, Cottbus, 2011, DOI: 10.1109/DDECS.2011.5783060.
  • X. Fan, M. Krstic, C. Wolf, E. Grass, GALS Design for On-Chip Ground Bounce Suppression, 17th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2011, pp. 43 – 52, Ithaca, NY, 2011, DOI: 10.1109/ASYNC.2011.11.
  • Z.  Stamenkovic, K. Tittelbach-Helmrich, M. Krstic, J. Ibanez, V. Elvira, I. Santamaria, MAC and Baseband Hardware Platforms for RF-MIMO WLAN, Proc. 5th European Conference on Circuits and Systems for Communications, pp. 26 – 33, Belgrade, Serbia, Nov 2010.
  • V. Elvira, J. Ibanez, I. Santamaria, M. Krstić, K. Tittelbach-Helmrich, Z. Stamenković, Baseband Processor for RF-MIMO WLAN, In Proc. 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, pp. 798 – 801, Athens, Dec 2010, DOI: 10.1109/ICECS.2010.5724633.
  • X. Fan, M. Krstic, T. Krol, C. Wolf, E. Grass, A GALS FFT Processor with Clock Modulation for Low-EMI Applications, In Proc. ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors, pp. 273 – 278, July 7-9, 2010  Rennes, France, DOI: 10.1109/ASAP.2010.5541014.
  • S. Zeidler, A. Bystrov, M. Krstic, R. Kraemer, On-line Testing of Bundled-Data Asynchronous Handshake Protocols, in Proceedings of 16th IEEE International On-Line Testing Symposium, Corfu Island, Greece, pp. 261 – 267, July 5–7, 2010, DOI: 10.1109/IOLTS.2010.5560190.
  • X. Fan, M. Krstić, E. Grass, Analysis and Optimization of Pausible Clocking based GALS Design, In Proc. of XXVII IEEE International Conference on Computer Design (ICCD), 2009, Resort at Squaw Creek, Lake Tahoe, California, pp 358-365, DOI: 10.1109/ICCD.2009.5413130, "Best Paper" award.
  • T. Król, M. Krstić, X. Fan, E. Grass, Modeling and Reducing EMI in GALS and Synchronous Systems, In Proc. International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS) 2009, LNCS, Vol. 5953/2010, Springer, pp. 146-155, DOI: 10.1007/978-3-642-11802-9_19.
  • Z. Stamenković, K. Tittelbach-Helmrich, M. Krstić, J. Perez, J. Via, J. Ibañez, Architecture of an IEEE802.11a Compliant Wireless MIMO-OFDM System, In Proceedings of ICT-MobileSummit 2009, 10 - 12 June 2009, Santander, Spain.
  • S. Zeidler, M. Ehrig, M. Krstic, C. Wolf, R. Kraemer, Ultra Low Cost Asynchronous Handshake Checker, In proc. of 15th IEEE International On-Line Testing Symposium (IOLTS 2009), Sesimbra-Lisbon, Portugal, 2009, pp. 262-268, DOI: 10.1109/IOLTS.2009.5196026.
  • M. Krstic, X. Fan, E. Grass, F. Gürkaynak, GALS for Bursty Data Transfer based on Clock Coupling, Electronic Notes in Theoretical Computer Science, ENTCS17588, Volume 245, 2 August 2009, pp. 103-113, Proceedings of the 4th International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design (FMGALS 2009), A DATE'09 Friday Workshop, April 24., Nice, France, DOI: DOI: 10.1016/j.entcs.2009.07.031.
  • M. Piz, M. Krstic, M. Ehrig, E. Grass, An OFDM Baseband Receiver for Short-Range communication at 60 GHz, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2009, pp. 409 – 412, Taiwan, DOI: 10.1109/ISCAS.2009.5117772.
  • M. Krstić, M. Piz, M. Ehrig, E. Grass, OFDM Datapath Baseband Processor for 1 Gbps Datarate, Proceedings of IFIP/IEEE VLSI-SoC 2008 - International Conference on Very Large Scale Integration, Rhodes, Greece, Oct 13-15 2008, pp. 156-159.
  • E. Miletić, M. Krstić, M. Piz, M. Methfessel, Digital Automatic Gain Control Integrated on WLAN Platform, Proceedings of WASET, ICECS 2008: International Conference on Electronics, Circuits and Systems, Vienna, Austria, Vol. 31 July 2008, pp. 572-576.
  • C.S. Choi, E. Grass, F. Herzel, M. Piz, K. Schmalz, Y. Sun, S. Glisic, M. Krstic, K. Tittelbach, M. Ehrig, W. Winkler, R. Kraemer, C. Scheytt, 60GHz OFDM hardware demonstrators in SiGe BiCMOS: state-of-the-art and future development, Proceedings of IEEE 19th International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), 2008, pp. 1 – 5, Cannes, France, DOI: 10.1109/PIMRC.2008.4699879.
  • E. Grass, F. Herzel, M. Piz, K. Schmalz, Y. Sun, S. Glisic, M. Krstić, K. Tittelbach, M. Ehrig, W. Winkler, C. Scheytt, R. Kraemer, 60 GHz SiGe-BiCMOS Radio for OFDM Transmission, In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27 - 30 May 2007, pp. 1979-1982, (invited reviewed paper), DOI: 10.1109/ISCAS.2007.378424.
  • K. Maharatna, A. Troya, M. Krstić, E. Grass, On the Implementation of a Low-Power IEEE 802.11a Compliant Viterbi Decoder, Proc. 9th VLSI Design Conf., Heyderabad, India, p. 613, 3-7 Jan. 2006, DOI: 10.1109/VLSID.2006.124.
  • E. Grass, F. Winkler, M. Krstić, A. Julius, C. Stahl, M. Piz, Enhanced GALS Techniques for Datapath Applications, Proc. International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS), LNCS 3728, Springer Verlag, pp. 581-590, Leuven, Belgium, 2005, DOI: 10.1007/11556930_59.
  • M. Krstić, E. Grass, BIST Technique for GALS Systems, Proceedings - 8th EUROMICRO Conference on Digital System Design (DSD 2005)- Architectures, Methods and Tools, Porto, Portugal, pp. 10-16, August 30th - September 3rd, 2005, DOI: 10.1109/DSD.2005.22.
  • C. Stahl, W. Reisig, M. Krstić, Hazard Detection in a GALS Wrapper: a Case study, In Desel, J. and Watanabe, Y., editors, 5th International Conference on Application of Concurrency to System Design (ACSD’05), pages 234-243, IEEE Computer Society, 2005, DOI: 10.1109/ACSD.2005.20.
  • M. Krstić, E. Grass, C. Stahl, Request-driven GALS Technique for Wireless Communication System, Proc. 11th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2005), pp. 76-85, New York, Mar 2005, DOI: 10.1109/ASYNC.2005.28.
  • M. Krstić, E. Grass, GALSification of IEEE 802.11a Baseband Processor, Proc. International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS), LNCS 3254, Springer Verlag, pp. 258-267, Santorini, Greece, Sep 2004, DOI: 10.1007/978-3-540-30205-6_28.
  • K. Maharatna, A. Troya, S. Banerjee, E. Grass, M. Krstić, A 16-Bit CORDIC Rotator for High-Speed Wireless LAN, Proc. 15th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2004), Barcelona, Spain, September 2004, DOI: 10.1109/PIMRC.2004.1368299.
  • K. Maharatna, A. Troya, M. Krstić, E. Grass, U. Jagdhold, A CORDIC Like Processor for Computation of Arctangent and Absolute Magnitude of a Vector, Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Vol II, pp. 713-716, 2004, Vancouver, DOI: 10.1109/ISCAS.2004.1329371.
  • M. Krstić, E. Grass, GALS Baseband Processor for WLAN, Collection of regular and poster presentation of ACiD-WG Workshop, Turku, Finland, June 2004.
    A. Troya, M. Krstić, K. Maharatna, Simplified Residual Phase Correction Mechanism for the IEEE 802.11a Standard, Proc. IEEE Semiannual Vehicular Technology Conference (VTC), pp. 1137 – 1141, Vol.2, Orlando, USA, 2003, DOI: 10.1109/VETECF.2003.1285199.
  • M. Krstić, K. Maharatna, A. Troya, E. Grass, U. Jagdhold, Implementation of the IEEE 802.11A Compliant Low-Power Baseband Processor, Proc. 6th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS), Nis, Serbia, Vol I, pp. 97-100, 2003, DOI: 10.1109/TELSKS.2003.1246193.
  • M. Krstić, E. Grass, New GALS Technique for Datapath Architectures, Proc. International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS), LNCS 2779, Springer Verlag, Turin, Italy, pp. 161-170, 2003, DOI: 10.1007/978-3-540-39762-5_18.
  • M. Krstić, A. Troya, K. Maharatna, E. Grass, Optimized Low-Power Synchronizer Design for the IEEE 802.11a, Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Vol II, pp. 333-336, Hong Kong, 2003, DOI: 10.1109/ICASSP.2003.1202362.
  • M. Krstić, E. Grass, Request-driven GALS Technique for Datapath Architectures, Collection of regular and poster presentation of ACiD-WG Workshop, Crete, Greece, 2003.
    A. Troya, K. Maharatna, M. Krstić, E. Grass, R. Kraemer, OFDM Synchronizer Implementation for an IEEE802.11a Compliant Modem, Proc. IASTED International Conference on Wireless and Optical Communications (WOC-2002), Banff, Canada, ISBN 0-88986-344-X, pp. 152-157, 2002.
  • M. Stojčev, M. Krstić, Parity error detection in embedded computer system (invited reviewed paper), Proc. 5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS), Nis, Yugoslavia, Vol II, pp. 445-450, 2001, DOI: 10.1109/TELSKS.2001.955816.
  • M. Krstić, M. Stojčev, FPGA implementation of hardware voter, Proc. 5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS), Nis, Yugoslavia, Vol II, pp. 401-404, 2001, DOI: 10.1109/TELSKS.2001.955806.