Zum Hauptinhalt springen

Veröffentlichungen

 

    Publications in Conference Proceedings

    2023

    • Fritjof Steinert and Benno Stabernack
      FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
      ARCS2023: 36th GI/ITG International Conference on Architecture of Computing Systems,
      Athens, Greece 13-15. June 2023
    • Enabling Communication with FPGA-based Network-attached Accelerators for HPC Workloads
      Steffen Christgau, Dylan Everingham, Florian Mikolajczak, Niklas Schelten, Bettina Schnor, Max Schrötter, Benno Stabernack and Fritjof Steinert
      Accepted for the Ninth International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)
      Denver, USA, November 2023
    • NAAICE: Network-Attached Accelerators for Heterogenous Computing Environments
      Steffen Christgau, Dylan Everingham, Tobias Jaeuthe, Marco De Lucia, Max Lübke, Florian Mikolajczak, Danny Puhan, Niklas Schelten, Bettina Schnor, Johannes Spazier, Benno Stabernack and Fritjof Steinert
      29th Workshop GI/ITG Fachgruppe PARS
      Aachen, Germany, September 2023
    • Challenges using FPGA Clusters for Distributed CNN Training
      Philipp Kreowsky, Justin Knapheide and Benno Stabernack
      FPL2023, Gotenburg, Sweden, September 2023
    • Demonstrating NADA: A Workflow for Distributed CNN Training on FPGA Clusters
      Justin Knapheide, Philipp Kreowsky and Benno Stabernack
      FPL2023, Gotenburg,Sweden, September 2023

    2022

    • Viktor Herrmann, Justin Knapheide, Fritjof Steinert and Benno Stabernack
      A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection
      DSD2022: Euromirco Conference on Digital Systems Design 2022
    • M. Stec, B. Stabernack and C. Kubach,
      Towards an optimal right-turn assistant system to avoid accidents with vulnerable traffic participants,
      2022 11th Mediterranean Conference on Embedded Computing (MECO),
      2022, pp. 1-5, doi: 10.1109/MECO55406.2022.9797083.

    2021

    • Benno Stabernack and Fritjof Steinert:
      Architecture of a Low Latency H.264/AVC Video Codec for robust ML based Image Classification
      Workshop on Design and Architectures for Signal and Image Processing
      (14th edition) (DASIP ’21). Association for Computing Machinery, New
      York, NY, USA, 1-9.
      DOI:https://doi.org/10.1145/3441110.3441149.
    • Fritjof Steinert, Justin Knapheide and Benno Stabernack:
      Demonstration of a Distributed Accelerator Framework for Energy Efficient ML Processing
      2021 31st International Conference on Field-Programmable Logic and Applications (FPL), 2021, pp. 386-386,
      doi: 10.1109/FPL53798.2021.00077.

    2020

    • N. Schelten, F. Steinert, A. Schulte and B. Stabernack:
      A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol for Network-Attached Hardware Accelerators
      2020 International Conference on Field-Programmable Technology (ICF-PT), 2020, pp. 241-249, doi: 10.1109/ICFPT51103.2020.00042.10
    • F. Steinert, P. Kreowsky, E. L. Wisotzky, C. Unger and B. Stabernack:
      A Hardware/Software Framework for the Integration of FPGA-based Accelerators into Cloud Computing Infrastructures
      IEEE International Conference on Smart Cloud (SmartCloud),pp. 23-28,
      DOI: 10.1109/SmartCloud49737.2020.00014.
    • J. Knapheide, B. Stabernack and M. Kuhnke:
      A High Throughput MobileNetV2 FPGA Implementation Based on a Flexible Architecture for Depthwise Separable Convolution
      30th International Conference on Field-Programmable Logic and Applications (FPL), 2020, pp. 277-283
      DOI: 10.1109/FPL50879.2020.00053.
    • F. Steinert, N. Schelten, A. Schulte and B. Stabernack:
      Hardware and Software Components towards the Integration of Network-Attached Accelerators into Data Centers
      23rd Euromicro Conference on Digital System Design (DSD), 2020, pp.149-153,
      DOI: 10.1109/DSD51259.2020.00033.

    2019

    • M. Stec, V. Herrmann and B. Stabernack:
      Using Time-of-Flight Sensors for People Counting Applications
      Conference on Design and Architectures for Signal and Image Processing (DASIP), 2019, pp. 59-64
      DOI: 10.1109/DASIP48288.2019.9049169.
    • M. Stec, V. Herrmann and B. Stabernack:
      Multi-Sensor-Fusion System for People Counting Applications
      First International Conference on Societal Automation (SA), 2019, pp. 1-4
      DOI: 10.1109/SA47457.2019.8938046.

    2016

    • Jens Brandenburg and Benno Stabernack:
      Simulation based Analysis of Memory Access Conflicts for Heterogeneous Multi-Core Platforms,
      12th Workshop on Parallel Algorithms and Systems and Algorithms (PASA), Nuremberg, Germany, April 4-5, 2016.

    2015

    • Jens Brandenburg and Benno Stabernack:
      Exploring the Concurrent Execution of HEVC Intra Encoding Algorithms for Heterogeneous Multi Core Architectures, Electronic Systems and Chip Initiative,
      Conference on Design & Architectures for Signal & Image Processing (DASIP2015), Cracow, Poland, September 23-25, 2015.
    • Benno Stabernack, Jan Möller, Jan Hahlbeck and Jens Brandenburg:
      Demonstrating an FPGA Implementation of a Full HD Real-time HEVC Decoder with Memory Optimizations for Range Extensions Support,
      Conference on Design & Architectures for Signal & Image Processing(DASIP2015), Cracow, Poland, September 23-25, 2015.
    • Erol Koser and Benno Stabernack:
      A run-time reconfigurable NoC Monitoring System for performance analysis and debugging support,
      26. GI/ITG Workshop Parallel -Algorithmen, -Rechnerstrukturen und -Systemsoftware (PARS), University of Potsdam, Germany, May 2015.

    2014

    • Jan Hahlbeck and Benno Stabernack:
      A 4k capable FPGA based high throughput binary arithmetic decoder for H.265/MPEG-HEVC,
      IEEE International Conference on Consumer Electronics - Berlin 2014, Berlin, Germany, September 2014.

    2013

    • Jens Brandenburg and Benno Stabernack:
      Memory Access Analysis and Optimization of a Parallel H.264/SVC Decoder for an Embedded Multi-Core Platform,
      Electronic Systems and Chip Initiative, Conference on Design and Architectures for Signal and Image Processing (IEEE DASIP2013), Cagliari, Italy, October 8-10, 2013.
    • A. Bartzas, P. Bellasi, Jens Brandenburg, W. Fornaciari, I. Koutras, G. Massari, G. Palermo, E. Paone, C. Silvano, D. Soudris, S. Xydis, and V. Zaccaria:
      Cooperative Design Space Exploration and Run-Time Resource Management for Application Adaptivity on Multi-Core Platforms: A Networked Video Surveillance Use Case,
      Proceedings of the DATE 2013 International Conference, DEPCP2013, WORKSHOP: Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools and Applications, Grenoble, France, March 19-22, 2013.
    • Jens Brandenburg and Benno Stabernack:
      Performance and Memory Access Analysis for Embedded Multi-Core Media Signal Processing Platforms using NoCTrace,
      Proceedings of 8th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) / Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms, Berlin, Germany, January 21-23, 2013.

    2012

    • Henryk Richter, Benno Stabernack and Volker Kühn:
      Architectural Decomposition of Video Decoders for Many Core Architectures,
      Electronic Systems and Chip Initiative, Conference on Design and Architecture for Signal and Image Processing (IEEE DASIP2012), Karlsruhe, Germany, October 23-25, 2012.
    • Benno Stabernack and Jens Brandenburg:
      A Novel Profiling Methodology for Many-Core Simulation Models aiming HW/SW Co-Optimization,
      Proceedings of the DATE 2012 International Conference, DEPCP2012, WORKSHOP: Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools and Applications, Dresden, Germany, March 12-16, 2012.
    • Jens Brandenburg and Benno Stabernack:
      A Generic and Non-Intrusive Profiling Methodology for SystemC Multi-Core Platform Simulation Models,
      Proceedings of ARCS 2012 - Architecture of Computing Systems Conference, Munich, Germany, February 28 - March 02, 2012.
    • Benno Stabernack and Jens Brandenburg:
      NoCTrace - A Non Intrusive System Level Architecture Exploration Tool for Network on Chip Architectures,
      Proceedings of 7th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) / Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms, Paris, France, January 24, 2012.

    2011

    • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi, F. Castro, S. Corbetta, E. Speziale, D. Melpignano, J.M. Zins, H. Hubert, Benno Stabernack, Jens Brandenburg, M. Palkovic, P. Raghavan, C. Ykman-Couvreur, A. Bartzas, D. Soudris, T. Kempf, G. Ascheid, H. Meyr, and J. Ansari, P. Mahonen, and B. Vanthournout:
      Parallel Paradigms and Run-time Management Techniques for Many-core Architectures: The 2PARMA Approach,
      Proceedings of IEEE 9th International Conference on Industrial Informatics (INDIN'2011), Caparica, Lisbon, Portugal, July 26-29, 2011, Invited Paper.
    • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi, F. Castro, S. Corbetta, E. Speziale, D. Melpignano, J.M. Zins, H. Hubert, Benno Stabernack, Jens Brandenburg, M. Palkovic, P. Raghavan, C. Ykman-Couvreur, I. Anagnostopoulos, A. Bartzas, D. Soudris, T. Kempf, G. Ascheid, H. Meyr, J. Ansari, P. Mahonen, and B. Vanthournout:
      Parallel programming and Run-time Resource Management Framework for Many-core Platforms: The 2PARMA Approach,
      Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'2011), Montpellier, France, June 20-22, 2011, Invited Paper.
    • Benno Stabernack and Jens Brandenburg:
      NoCTrace - A System Level Architecture Exploration Tool for Network on Chip Architectures,
      DATE Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP 2011), Grenoble, France, March 14-18, 2011.
    • Cristina Silvano, William Fornaciari, David Siorpaes, Benno Stabernack, Chantal Couvreur, Dimitrios Soudris, Torsten Kempf, and Bart Vanthournout:
      2PARMA: PARallel PAradigms and Runtime MAnagement techniques for Many-core Architectures,
      DATE Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP 2011), Grenoble, France, March 14-18, 2011.

    2010

    • Heiko Hübert and Benno Stabernack:
      Energy Analysis of Embedded Software Based on a Cycle-Accurate Processor Power Model,
      Proceedings of the IEEE Symposium on Industrial Electronics and Applications (ISIEA 2010),Penang, Malaysia, October 3-6, 2010.
    • Benno Stabernack:
      Programming Multicore Architectures: The 2PARMA Approach,
      Intel European Research and Innovation Conference 2010 (ERIC 2010) Braunschweig, Germany, September 2010.
    • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi, F. Castro, S. Corbetta, A. Di Biagio, E. Speziale, M. Tartara, D. Siorpaes, H. Hübert, Benno Stabernack, Jens Brandenburg, M. Palkovic, P. Raghavan, C. Ykman-Couvreur, A. Bartzas, S. Xydis, D. Soudris, T. Kempf, G. Ascheid, H. Meyr, J. Ansari, P. Mähönen, and B. Vanthournout:
      2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures,
      IEEE Computer Society, Annual Symposium on VLSI 2010, Lixouri, Kefalonia, Greece, July 2010.
    • Thomas Wirth, Lars Thiele, Thomas Haustein, Jens Brandenburg and Benno Stabernack:
      Scalable Video Broadcasting Trials in 4G Cellular Deployments,
      Proceedings of the Future Network Mobile Summit, Florence, Italy, June 2010.

    2009

    • Henryk Richter, Benno Stabernack, and Erika Müller:
      Adaptive multithreaded H.264/AVC decoding,
      Asilomar Conference on Signals, Systems, and Computers, Monterey, CA, USA, November 2009.
    • Benno Stabernack, Heiko Hübert, Jens Brandenburg, and Jan Möller:
      An Experimental Mobile Terminal for Scalable Video Coding Applications using a H.264/AVC Decoder SOC,
      Proceedings of 13th IEEE International Symposium on Consumer Electronics, Mielparque-Kyoto, Kyoto, Japan, May 25-28, 2009.
    • Heiko Hübert and Benno Stabernack:
      Power Modeling of an Embedded RISC Core for Function-Accurate Energy Profiling,
      ITG Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Berlin, Germany, March 2009.

    2008

    • Henryk Richter and Benno Stabernack:
      Generic Algorithms for Motion Compensation and Transformation,
      IS&T/SPIE´s 20th Annual Symposium Electronic Imaging, Conference: Real-Time Image Processing 2008, Proceedings of SPIE, San Jose, USA, vol. 6811, pp. 27-30, January 27-30, 2008.

    2007

    • Heiko Hübert, Benno Stabernack, and Kai-Immo Wels:
      Performance and Memory Profiling for Embedded System Design,
      Proceedings IEEE Second International Symposium on Industrial Embedded Systems (SIES 2007), Lisbon, Portugal, July 2007.
    • Benno Stabernack, Kai-Immo Wels, and Heiko Hübert:
      A Video Coprocessor for Mobile Multi Media Signal Processing,
      Proceedings of the Eleventh IEEE International Symposium on Consumer Electronics (ISCE 2007), Dallas, USA, June 2007.

    2006

    • Benno Stabernack, Heiko Hübert, and Kai-Immo Wels:
      A Companion Chip for H.264/AVC Video Processing,
      Proceedings GSPx 2006, Santa Clara, USA, October 2006.
    • Benno Stabernack, Heiko Hübert, and Kai-Immo Wels:
      Terminal Architectures for DVB-H,
      Proceedings GSPx-TV to Mobile 2006, Amsterdam, March 2006.
    • Benno Stabernack, Heiko Hübert, and Kai-Immo Wels:
      A H.264 Video Coprocessor for Mobile DVB-H Terminals,
      IEEE International Conference on Consumer Electronics ICCE 2006, Las Vegas, January 2006.

    2005

    • Benno Stabernack and Rainer Großmann:
      Design und Implementierung eines mobilen Endgerätes für DVB-H Empfang,
      Proceedings Dortmunder Fernsehseminar, ITG/FKTG Fachtagung, Dortmund, Germany, October 2005.
    • Benno Stabernack and Henryk Richter:
      Media Processor Architectures for Mobile DVB-H Terminals,
      Proceedings GSPx 2005, Santa Clara, USA, October 2005.
    • Henryk Richter and Benno Stabernack:
      Realtime Optimization Techniques for Processor based H.264 Intra Frame Compression,
      Proceedings GSPx 2005, Santa Clara, USA, October 2005.
    • Benno Stabernack and Henryk Richter:
      Instruction Set extensions for Mobile Video Applications on Embedded RISC Processors,
      IEEE International Conference on Consumer Electronics ICCE 2005, January 2005.

    2004

    • Benno Stabernack, Henryk Richter, and Erika Müller:
      A SIMD Instruction Set Architecture optimized for H.264 video Processing,
      Picture Coding Symposium (PCS'04), San Francisco, CA, USA, December 2004.
    • Heiko Hübert, Benno Stabernack, and Henryk Richter:
      Tool-Aided Performance Analysis and Optimization of Multimedia Applications,
      Second Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia 2004), Stockholm, Sweden, September 2004.
    • Heiko Hübert, Benno Stabernack, and Henryk Richter:
      Tool-Aided Performance Analysis and Optimization of an H.264 Decoder for Embedded Systems,
      The Eighth IEEE International Symposium on Consumer Electronics (ISCE 2004), Reading, England, September 2004.

    2003

    • Benno Stabernack, Henryk Richter, and Erika Müller:
      Evaluating and Implementing H.264 for Embedded and Mobile Streaming Applications,
      SPIE XXVI Applications of Digital Image Processing, August 2003.
    • Benno Stabernack, Kai-Immo Wels, Corina Scheiter, Rainer Steffen, Markus Zeller, and Rudi Knorr:
      A System for QoS enabled MPEG-4 Video Transmission over Bluetooth for Mobile Applications,
      IEEE International Conference on Mulitmedia and Expo ICME 2003, Baltimore, July 2003.
    • Benno Stabernack and Gerd von Cölln:
      An MPEG-4 Video Codec SOC for Mobile Multi Media Applications,
      IEEE International Conference on Consumer Electronics ICCE 2003, Los Angeles, June 2003.

    2002

    • Benno Stabernack, Thomas Schierl, Henryk Richter, and T. Rathgen:
      Using RTSP/RTP and MPEG-4 for streaming and bi-directional mobile multimedia communication,
      IEEE International Symposium on Consumer Eletronics ISCE 02, Illmenau, Germany, September 2002.
    • Benno Stabernack, Martin Köhler, Matthias Reißmann, and Gerd von Cölln:
      A processor based system on a chip design für mobile multi media applications,
      IEEE International Symposium on Consumer Eletronics ISCE 02, Illmenau, Germany, September 2002.
    • Benno Stabernack and Henryk Richter:
      High Quality Multimedia Streaming using MPEG-4 Technology,
      6th World Multiconference on Systemics, Cybernetics and Informatics (SCI 2002), Orlando, USA, July 2002.
    • Benno Stabernack, and Henryk Richter:
      A Multi Media Streaming Framework for Mobile Applications, A first Approach,
      12 th International Packetvideo Workshop (PV2002), Pittsburgh PA, USA, April 2002.

    2001

    • Henryk Richter, Aljoscha Smolic, Benno Stabernack, and Erika Müller:
      Real Time Global Motion Estimation for an MPEG-4 Video Encoder,
      Picture Coding Symposium (PCS'01), Seoul, Korea, April 2001.

    1999

    • Benno Stabernack:
      Real time implementation of an DSP-based MPEG-4 Videodecoder,
      ICSPAT, Orlando, FL USA, October 1999.
    • Benno Stabernack:
      Echtzeitimplementierung eines MPEG-4 Videodecoders basierend auf dem digitalen Signalprozessor TMS320C6201 von Texas Instruments,
      Dortmunder Fernsehtagung, January 1999.

    1998

    • M. Berekovic, G. Meyer, Yong Guo, P. Pirsch, and Benno Stabernack:
      A Multimedia RISC Core for efficient Bitstream Parsing and VLD,
      Multimedia Hardware Architectures, Proceedings of SPIE, January 1998.

    1996

    • Benno Stabernack:
      A Flexible MPEG-2 Audio Decoder and Transport Stream Interface based on TMS 320C40 and ITT MAS3500C,
      Proceedings of the European Workshop on Image Analysis and Coding for TV, HDTV and Multimedia Applications, Rennes, France, February 1996.
    • Benno Stabernack and H. Zeuner:
      A Flexible MPEG 2 Audio Decoder and Transport Stream Interface Based on Motorola DSP56302,
      ICSPAT 1996, Januar 1996.

    1995

    • Christian Stoffers, B. Bölike, S. Fazelpour, H. Reichl, and Maati Talmi:
      Systementwurf und Einsatzumgebung eines Multi-Chip-Moduls als Bewegungsschätzer für HDTV-Anwendungen,
      SMT'95, Electronic Systems & Solutions, Hybrid'95, Nürnberg, Germany, May 1995.
    • Stefan Wolf, Maati Talmi, Christian Stoffers, Martin Hahn, and M. Braun:
      Key Components for Format Conversion,
      European Workshop on Image Format Conversion and Transcoding, Berlin, Germany, March 1995.
    • Benno Stabernack, C. Heinelt, Maati Talmi, and W. Sinnhöfer:
      A Flexible MPEG 2 Audio Decoder and Transport Stream Interface Based on TMS320C40 and ITT MAS3500C,
      International Conference on Signal Processing and Applications (ICSPAT), Boston, Massachusetts, USA, January 1995.

    1994

    • Benno Stabernack:
      Entwicklung eines MPEG-2 Surround Sound Dekoders unter Einsatz der Signalprozessoren TMS320C40 von Texas Instruments und MAS3500C von Intermetall,
      ITG Fachtagung Chemnitz, January 1994.
    • Benno Stabernack, C. Heinelt, and W. Sinnhofer:
      A Flexible MPEG-2 Audio Decoder and Transport Stream Interface Based on TMS320C40 and ITT MASC3500C,
      ICSPAT 1994, January 1994.

    Publications in Journals

    2022

    • Benno Stabernack and Fritjof Steinert:
      Architecture of a Low Latency H.264/AVC Video Codec for robust ML based Image Classification,
      Journal of Signal Processing Systems,
      doi.org/10.1007/s11265-021-01727-2

    2021

    • Philipp Kreowsky and Benno Stabernack:
      A full-featured FPGA-based pipelined Architecture for SIFT Extraction,
      IEEE Access, vol. 9, pp. 128564-128573, 2021, doi: 10.1109/ACCESS.2021.3104387.2018

    2018

    • C. Herglotz, D. Springer, M. Reichenbach, B. Stabernack and A. Kaup:
      Modeling the Energy Consumption of the HEVC Decoding Process,
      IEEE Transactions on Circuits and Systems for Video Technology, vol. 28,
      no. 1, pp. 217-229, Jan. 2018, doi: 10.1109/TCSVT.2016.2598705.

    2016

    • Jens Brandenburg and Benno Stabernack:
      Simulation-based HW/SW Co-Exploration of the Concurrent Execution of HEVC Intra Encoding Algorithms for Heterogeneous Multi-Core Architectures,
      Elsevier Journal of Systems Architecture JSA, December 2016, doi:10.1016/j.sysarc.2016.12.009.

    2014

    • Benjamin Bross, Heiko Schwarz, Benno Stabernack and Detlev Marpe:
      Das erste Jahr: HEVC in der Praxis,
      FKT der Fernseh- und Kinotechnischen Gesellschaft, Fachverlag Schiele & Schön, Heft 08-09/2014, August 2014, in German.
    • Denis Engelhardt, Jan Hahlbeck, Jan Möller and Benno Stabernack:
      FPGA Implementation of a Full HD Real-time HEVC Main Profile Decoder,
      IEEE Transactions on Consumer Electronics, vol. 62, issue 3, August 2014.
    • Martin Werner, Benno Stabernack, and Christian Riechert:
      Hardware Implementation of a Full HD Real-time Disparity Estimation Algorithm,
      IEEE Transactions on Consumer Electronics, vol. 60, issue 1, February 2014.
    • Henryk Richter, Benno Stabernack and Volker Kühn:
      Architectural Decomposition of Video Decoders by means of an Intermediate Data Stream Format,
      Springer Journal of Signal Processing Systems.

    2013

    • Heiko Hübert, Benno Stabernack , and Frederik Zilly:
      Architecture of a Low Latency Image Rectification Engine for Stereoscopic 3D HDTV Processing,
      IEEE Transactions on Circuits and Systems for Videotechnology, vol. 23, no. 6, May 2013.

    2010

    • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi F. Castro, S. Corbetta, A. Di Biagio, E. Speziale, M. Tartara (Dipartimento di Elettronica e Informazione, Politecnico di Milano, Italy); D. Siorpaes (STMicroelectronics, Italy); H. Hübert, Benno Stabernack, Jens Brandenburg (Fraunhofer HHI, Germany); M. Palkovic, P. Raghavan, C. Ykman-Couvreur (IMEC vzw, Belgium. Also with IBBT, Belgium); A. Bartzas, S. Xydis, D. Soudris (Institute of Communication and Computer Systems, National Tech. University of Athens, Greece); T. Kempf, G. Ascheid, H. Meyr, J. Ansari, P. Mähönen (RWTH – Aachen University, Germany); Bart Vanthournout(CoWare, Belgium):
      Parallel Paradigms and Run-time Management Techniques for Many-core Architectures: The 2PARMA Approach,
      IEEE Micro Special Issue European Multicore Processing Projects, September/October 2010.

    2009

    • Heiko Hübert and Benno Stabernack:
      Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures,
      IEEE Transactions on Circuits and Systems for Videotechnology, Special Issue on Algorithm/Architecture Co Exploration of Visual Computing, December 2009.

    2007

    • Benno Stabernack, Heiko Hübert, and Kai-Immo Wels:
      A System on a Chip Architecture of an H.264/AVC Coprocessor for DVB-H and DMB Applications,
      IEEE Transactions on Consumer Electronics, vol. 53, issue 4, May 2007.

    2004

    • Benno Stabernack:
      Architekturkonzepte für prozessorbasierte MPEG-Videodecoder mit Schwerpunkt für mobile Anwendungen,
      Dissertation an der TU-Berlin, Fakultät IV Elektrotechnik und Informatik, Berlin, Germany, December 2004.
    • Benno Stabernack:
      Verfahren und Anordnung zur Ermittlung der Decodierungskomplexität von blockbasiert codierten Videodatenströmen sowie Verwendung dieses Verfahrens und ein entsprechendes Computerprogramm-Erzeugnis zur Regelung der Taktfrequenz,
      DE-Patentanmeldung, amtliches Aktenzeichen 103 13 149.3, Munich, Germany, January 2004.

    1999

    • Benno Stabernack, M. Berekovic, H. J. Stolberg, M. B. Kulaczewski, P. Pirsch, H. Möller, H. Runge, and J. Kneip:
      Instruction Set Extensions for MPEG-4 Video,
      Journal of VLSI Signal Processing Systems, January 1999.

    1997

    • G. Junge, Holger Krahn, T. Schleinig, Thorsten Selinger, and Benno Stabernack:
      HDTV durch die digitale Hintertür,
      Zeitschrift Elektronik, Heft 18/1997, pp. 58, January 1997.
    • Benno Stabernack and Maati Talmi:
      Entwicklung eines MPEG-2 Surround-Sound Dekoders unter Einsatz der Signalprozessoren TMS320C40 von Texas Instruments und MAS3500C von Intermetall,
      IVDE-Verlag GmbH, ITG-Fachbericht, Berlin, Offenbach,Germany, no. 138, January 1996.

    Contributions to Standardization

     

    2019

    • Heiner Kirchhoffer, Christian Bartnik, Paul Haase, Tobias Hinz, Stefan Matlage, Benno Stabernack, Jan Stegemann, Detlev Marpe, Heiko Schwarz, Thomas Wiegand:
      CE5-related: Minor optimizations for increasing the throughput of CE5.1.5 and CE5.1.6
      Document JVET-M0389 of the JVET , 2019
    • Benno Stabernack, T. Hsieh:
      CE5: Report of subtest 3 on complexity and throughput aspects for hardware
      Document JVET-M0759 of the JVET , 2019
    • Heiner Kirchhoffer, Christian Bartnik, Tobias Hinz, Jan Stegemann, Paul Haase, Stefan Matlage, Benno Stabernack, Heiko Schwarz, Detlev Marpe,Thomas Wiegand:
      CE5: Report of software throughput analysis for CE5.2 by HHI
      Document JVET-M0762 of the JVET, 2019
    • Santiago De-Luxan-Hernandez, Benjamin Bross, Tung Nguyen, Valerie George, Benno Stabernack, Heiko Schwarz, Detlev Marpe, Thomas Wiegand:
      Ristriction of the maximum CU size for ISP to 64x64
      Document JVET-N0308 of the JVET, 2019
    • Santiago De-Luxan-Hernandez, Benjamin Bross, Tung Nguyen, Valeri George, Benno Stabernack, Heiko Schwarz, Detlev Marpe, Thomas Wiegand:
      Non-CE3: ISP with independent sub-partitions for certain block sizes
      Document JVET-N0372 of the JVET, 2019
    • Adarsh Krishnan Ramasubramonian, G. Van der Auwera, T. Hsieh, V. Seregin, L. Pham Van, M. Karczewicz, Santiago De-Luxan-Hernandez, Benjamin Bross, Tung Nguyen, Valerie George,
      Benno Stabernack, Heiko Schwarz, Detlev Marpe, Thomas Wiegand:
      CE3-1.6: On 1xN and 2xN subblocks of ISP
      Document JVET-O0106 of the JVET, 2019

      2003
    • Benno Stabernack, Detlev Marpe, and Thomas Wiegand:
      H.264/AVC Real-Time Video Decoder Demonstration,
      Joint Video Team, Doc. JVT-G042, Pattaya, Thailand, March 2003.
    • 1998
    • Benno Stabernack, et.al:
      Generically optimized VM7 compatible MPEG-4 video decoder,
      M2813, Conribution to ISO/IEC JTC1/SC29/WG11, January 1998.
    • Benno Stabernack, et al:
      Set Of Complexity Profiles For MPEG-4 VM-8- And VCD-V08-Compliant Video Decoder Implementations,
      M3182, Contribution to ISO/IEC JTC1/SC29/WG11, January 1998.
    • Talks and Tutorials

    • 2006
    • Heiko Hübert and Benno Stabernack:
      Using Configurable CPU Cores for Demanding Mobile Multimedia Applications,
      Proceedings ConfigCon 2006, Santa Clara, USA, October 2006, Invited Talk.
    • Heiko Hübert and Benno Stabernack:
      Using Configurable CPU Cores for Demanding Mobile Multimedia Applications,
      Proceedings ConfigCon 2006, Taipei, February 2006, Invited Talk.
    • Publications in Books

    • 2011
    • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria, P. Bellasi, F. Castro, S. Corbetta, A. Di Biagio, E. Speziale, M. Tartara, D. Melpignano, J.-M. Zins, D. Siorpaes, H. Hubert, Benno Stabernack, Jens Brandenburg, M. Palkovic, P. Raghavan, C. Ykman-Couvreur, A. Bartzas, S. Xydis, D. Soudris, T. Kempf, G. Ascheid, R. Leupers, H. Meyr, J. Ansari, P. Mahonen and B. Vanthournout:
      2PARMA: Parallel Paradigms and 3 Run-time Management Techniques for Many-Core Architectures,
      VLSI 2010 Annual Symposium, Selected Papers, Editors: N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner, Lecture Notes in Electrical Engineering, Springer Netherlands, vol. 57, pp. 65-79, August 31, 2011, ISBN 978-94-007-1487-8.
    • 2008
    • Benno Stabernack, Heiko Hübert, and Kai-Immo Wels:
      Hardware and Software Architectures for Mobile Multi Media Signal Processing,
      Handbook of Mobile Broadcasting: DVB-H, DMB, ISDB-T and MediaFLO, CRC Press, Taylor & Francis Group Editors: Borko Furht, Florida Atlantic University and Syed Ahson, Motorola Auerbach Pub, April 2008.
    • 2004
    • Benno Stabernack: Architekturkonzepte für prozessorbasierte MPEG Videodecoder mit Schwerpunkt für mobile Anwendungen,TU-Berlin, Fakultät IV, Fachgebiet Rechnertechnologie, September 2004.